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VLSI-SoC: New Technology Enabler 27th IFIP WG 10.5/IEEE International Conference

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Item specifics

Condition
Like New
A book in excellent condition. Cover is shiny and undamaged, and the dust jacket is included for hard covers. No missing or damaged pages, no creases or tears, and no underlining/highlighting of text or writing in the margins. May be very minimal identifying marks on the inside cover. Very minimal wear and tear. See all condition definitionsopens in a new window or tab
Seller Notes
“Excellent Condition”
Book Title
Vlsi-Soc: New Technology Enabler: 27Th Ifip Wg 10 5/Ieee Int...
ISBN
9783030532727

About this product

Product Identifiers

Publisher
Springer International Publishing A&G
ISBN-10
3030532720
ISBN-13
9783030532727
eBay Product ID (ePID)
5050424349

Product Key Features

Number of Pages
Xvii, 345 Pages
Language
English
Publication Name
VLSI-SoC: New Technology Enabler : 27th IFIP WG 10. 5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers
Subject
Operating Systems / General, Hardware / General, Data Transmission Systems / Electronic Data Interchange
Publication Year
2020
Type
Textbook
Author
Pierre-Emmanuel Gaillardon
Subject Area
Computers
Series
Ifip Advances in Information and Communication Technology Ser.
Format
Hardcover

Dimensions

Item Weight
25.1 Oz
Item Length
9.3 in
Item Width
6.1 in

Additional Product Features

Series Volume Number
586
Number of Volumes
1 vol.
Illustrated
Yes
Table Of Content
Software-Based Self-Test for Delay Faults.- On Test Generation for Microprocessors for Extended Class of Functional Faults.- Robust FinFET Schmitt Trigger Designs for Low Power Applications.- An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults.- Process Variability Impact on the SET Response of FinFET Multi-level Design.- Efficient Soft Error Vulnerability Analysis Using Non-Intrusive Fault Injection Techniques.- A Statistical Wafer Scale Error and Redundancy Analysis Simulator.- Hardware-enabled Secure Firmware Updates in Embedded Systems.- Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance.- Security Aspects of Real-time MPSoCs: The Flaws and Opportunities of Preemptive NoCs.- Offset-Compensation Systems for Multi-Gbit/s Optical Receivers.- Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.- Semi- and Fully-Random Access LUTs for Smooth Functions.- A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.- Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework.
Synopsis
Software-Based Self-Test for Delay Faults.- On Test Generation for Microprocessors for Extended Class of Functional Faults.- Robust FinFET Schmitt Trigger Designs for Low Power Applications.- An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults.- Process Variability Impact on the SET Response of FinFET Multi-level Design.- Efficient Soft Error Vulnerability Analysis Using Non-Intrusive Fault Injection Techniques.- A Statistical Wafer Scale Error and Redundancy Analysis Simulator.- Hardware-enabled Secure Firmware Updates in Embedded Systems.- Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance.- Security Aspects of Real-time MPSoCs: The Flaws and Opportunities of Preemptive NoCs.- Offset-Compensation Systems for Multi-Gbit/s Optical Receivers.- Accelerating Inference on Binary Neural Networks with Digital RRAM Processing.- Semi- and Fully-Random Access LUTs for Smooth Functions.- A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors.- Exploiting Heterogeneous Mobile Architectures through a Unified Runtime Framework., This book contains extended and revised versions of the best papers presented at the 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, held in Cusco, Peru, in October 2019. The 15 full papers included in this volume were carefully reviewed and selected from the 28 papers (out of 82 submissions) presented at the conference. The papers discuss the latest academic and industrial results and developments as well as future trends in the field of System-on-Chip (SoC) design, considering the challenges of nano-scale, state-of-the-art and emerging manufacturing technologies. In particular they address cutting-edge research fields like heterogeneous, neuromorphic and brain-inspired, biologically-inspired, approximate computing systems.
LC Classification Number
TK7885-7895

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